Classification
With the development of computer technology, memory controllers are divided into two types: traditional and integrated.
Traditional
In traditional computer systems, the memory controller is located inside the north bridge chip of the motherboard chipset. The CPU needs to exchange data with the memory through the "CPU-- b>North Bridge--Memory--North Bridge--CPU" 5 steps. In this mode, data is transmitted through multiple stages, and the data delay is obviously large, which affects the computer system Overall performance;
Integrated
Integrated memory controller is a built-in memory controller on the base of the CPU. Let me talk about how the system works without a memory controller. The 26 data A~Z need to be transmitted to the CPU. At this time, the CPU issues an instruction to the north bridge (because the memory controller is integrated on the north bridge, so it is said to pass through the north bridge), the memory receives the instruction through the memory controller, this instruction is The A~Z data of unit b in the memory is transferred to the CPU, and the memory starts to fetch the data at this time, which is usually called addressing. When the memory finds this data, and each of these 26 data is 500MB, the sum of all data is about 12GB. Assuming that the memory is a dual-channel R2 800, the data transfer rate is 800MHZ multiplied by 128BIT divided by 8 bits per byte. =12GB per second. Through analysis, it is believed that it only takes one second to transmit to the CPU. At this time, the data is only transmitted to the North Bridge in one second. The memory controller is in the North Bridge. How can the data in the North Bridge be transmitted to the CPU? This will pass the FSB front-side bus. Assuming the FSB frequency is 800MHZ, then the data transfer rate is 800MHZ multiplied by 64BIT divided by 8 bits per second = 6.4GB per second. It takes 2 seconds from the North Bridge to the CPU, so the data is transmitted to The total time of the CPU is 3 seconds. Next, let’s take a look at how the system works when the CPU is integrated with the memory controller. After the data is transferred from the memory to the controller, it is also 1 second. The difference is that there is no need to pass through at this time. Tun Tun’s front-side bus is available, and the CPU can read data directly from the memory controller, because the memory controller is at the door of the CPU. For example, when an item is at your door, everyone can take it directly. This is it. Principle, forget it, it takes only 1 second for the CPU with integrated memory controller to read 12GB of data, so it greatly saves computing time and gives full play to the performance of the CPU.
Finally summarize: when the CPU does not have a memory controller, the data is transmitted by the memory controller---Northbridge----CPU; when there is a memory controller, the data is transmitted by the memory controller--- ---Transfer by way of CPU, in one step.
Working principle
The advantage of the integrated memory controller inside the CPU is that it can effectively control the memory controller to work at the same frequency as the CPU core, and due to the difference between the memory and the CPU Data exchange does not need to go through the North Bridge, which can effectively reduce transmission delay. For example, this is like moving the goods warehouse directly next to the processing workshop, which greatly reduces the time required for the transportation of raw materials and finished products between the goods warehouse and the processing workshop, and greatly improves production efficiency. As a result, the overall performance of the system has also been improved.
Memory frequency
Like CPU, memory also has its own operating frequency. The frequency is in MHz. The higher the frequency of the memory, the higher the speed that the memory can achieve. Fast. The main frequency of the memory determines the maximum frequency at which the memory can work normally. The most mainstream memory types are DDR3 and DDR4. As a replacement for DDR2, the frequency of DDR3 memory has reached 1600MHz, while the frequency of DDR4 memory is 2133MHz.
Memory capacity
Memory capacity is not only a factor that affects the price of memory, but also a factor that affects the performance of the entire system. In the past Windows XP platform, 512M of memory was still the mainstream, and 1GB was already a large capacity; 64-bit systems began to spread, Windows Vista, Windows 7, and Windows 10 were used by more and more people. Without about 2GB of memory, smooth operation may not be guaranteed. Degree. The capacity of a single memory is mainly 1GB, 2GB, 4GB, and the highest has reached a single memory of 8GB and a single memory of 16GB.
Working voltage
Different types of memory have different voltages for the normal operation of memory, but each has its own specifications. Exceeding its specifications may easily cause memory damage. The working voltage of DDR2 memory is generally around 1.8V, while DDR3 memory is around 1.5V or 1.35V. In order to overclock, the memory needs to work at a voltage higher than the standard. For each brand and model of memory, it depends on the manufacturer. As long as it floats within the allowable range, a slight increase in the memory voltage is conducive to memory overclocking, but at the same time the heat is greatly increased, so there is a risk of damaging the hardware.
Timing parameters
tCL: CAS Latency Control(tCL)
Generally, when we look up the timing parameters of the memory, such as " For digital sequences such as 8-8-8-24", the corresponding parameters of the above-mentioned digital sequences are "CL-tRCD-tRP-tRAS". The first "8" is the first parameter, the CL parameter.
CAS Latency Control (also described as tCL, CL, CAS Latency Time, CAS Timing Delay), CAS latency is "the latency of the address controller in the front of the memory read and write operations". CAS controls the time between receiving an instruction and executing the instruction. Because CAS mainly controls the hexadecimal address, or the column address in the memory matrix, it is the most important parameter and should be set as low as possible under the premise of stability.
Memory is addressed according to rows and columns. When the request is triggered, it is initially tRAS (Active to Precharge Delay). After pre-charge, the memory really starts to initialize RAS. Once tRAS is activated, RAS (Row Address Strobe) starts to address the data needed. The first is the row address, then tRCD is initialized, the cycle ends, and then the exact hexadecimal address of the required data is accessed through CAS. The period from the beginning of the CAS to the end of the CAS is the CAS delay. So CAS is the last step to find data, and it is also the most important of memory parameters.
This parameter controls how many clock cycles the memory waits after receiving a data read instruction before actually executing the instruction. At the same time, this parameter also determines the number of clock cycles required to complete the first part of the transfer in a memory burst transfer. The smaller the parameter, the faster the memory speed. It must be noted that part of the memory cannot be run at low latency, and data may be lost. And increasing the latency can make the memory run at a higher frequency, so when you need to overclock the memory, you should try to increase the CAS latency.
This parameter has the greatest impact on memory performance. Under the premise of ensuring system stability, the lower the CAS value, the faster the memory read and write operations.
tRCD: RAS to CAS Delay
This value is the second parameter in the "8-8-8-24" memory timing parameters, namely The second "8". RAS to CAS Delay (also described as: tRCD, RAS to CAS Delay, Active to CMD), which means "row addressing to column addressing delay time", the smaller the value, the better the performance. When reading, writing or refreshing the memory, it is necessary to insert a delay clock cycle between these two pulse signals. In the JEDEC specification, it is the second parameter. Reducing this delay can improve system performance. If the overclocking performance of your memory is not good, you can set this value to the default value of the memory or try to increase the tRCD value.
tRP: Row Precharge Timing(tRP)
This value is the third parameter in the "8-8-8-24" memory timing parameters , Which is the third "8". Row Precharge Timing (also described as: tRP, RAS Precharge, Precharge to active), which means "memory row address controller precharge time", the smaller the precharge parameter, the faster the memory read and write speed. tRP is used to set the charging time required by RAS before another row can be activated.
tRAS: Min RAS Active Timing
This value is the last parameter in the "8-8-8-24" memory timing parameters , Which is "24". Min RAS Active Time (also described as: tRAS, Active to Precharge Delay, Row Active Time, Precharge Wait State, Row Active Delay, Row Precharge Delay, RAS Active Time), which means "the shortest period from memory line valid to precharge" , The adjustment of this parameter needs to be determined according to the specific situation. Generally, it is best to set it between 24 and 30. This parameter should be determined according to the actual situation, not that the larger or smaller the better.
If the tRAS cycle is too long, the system will degrade performance due to unnecessary waiting. Reducing the tRAS cycle will cause the activated row address to enter the inactive state earlier. If the period of tRAS is too short, the burst transmission of data may not be completed due to lack of sufficient time, which may cause data loss or damage. This value is generally set to CAS latency + tRCD + 2 clock cycles.
For most people, the memory is a small piece of hardware that has a good capacity and frequency, and then plugs it into the motherboard to use it. They don’t care about its many small parameters at all. Therefore, industry manufacturers will also provide a more foolish way to read the parameter information of the memory SPD chip, automatically set various small parameters, simple and easy to use; more simple overclocking settings-XMP technology, so that ordinary users can simply enjoy The fun of overclocking and adding value.
Development process
Development direction
The integration of the memory controller into the CPU is obviously the future development direction, and its technology must become more and more perfect.
AMD's K8 series CPUs and later products (including various processors with interfaces such as Socket 754/939/940), the inside of the CPU integrates a memory controller, between the CPU and the memory The data exchange process is simplified to three steps of "CPU-Memory-CPU", and two steps are omitted. Compared with the traditional memory controller solution, it obviously has lower data delay, which helps to improve the overall performance of the computer system. .
In the latest Core i5 and Core i7 series CPUs, Intel has also introduced a solution to integrate memory controllers.
Development History
Intel launched a new micro-architecture after the 45-nanometer Penryn series, code-named Nehalem, and will see a number of new technologies by then, among which the integrated memory controller is undoubtedly very attractive . AMD has always integrated a memory controller in its own processor, which has achieved good memory performance, but it has also led to the need to update the processor interface every time the memory specification is upgraded; on the contrary, Intel insists on putting the memory controller in the north bridge chip At the same time, the adjustment of the processor itself depends more on the increase or decrease of the cache capacity. Although Intel has cited a number of reasons, saying that there are many benefits of not integrating a memory controller, but as the situation changes, Intel will naturally not go all the way to the black, to the next generation of new architecture. The memory controller will enter the Intel processor together with the graphics core. Obviously, Intel does more than simple integration. Native under the Nehalem architectureQuad core processorBloomfield will haveThree channelsDDR3 memory controller, Supports DDR3-1600 specifications and can provide a huge bandwidth of 38.4GB/s, which is almost doubled compared to the dual-channel 20GB/s or so. At the same time, the built-in graphics core can also be used. Get better performance, especially in 3D games. However, the dual-core processors under Nehalem will only be equipped with dual-channel memory controllers to widen the market gap.
Operation
Take AMD CPU as an example: the direct division of CPU frequency and multiplier in the Socket 939 era is the memory frequency supported by the CPU memory controller.
In the AM2 processor of the DDR2 era, although the core aspect also has a built-in DDR2 memory controller, it is different from the past Socket 939 interface in that the memory frequency it supports has been updated to the level of DDR2-800. The main frequency of the CPU can no longer be directly divided by the multiplier of the CPU, but an integer divided by one-half of the multiplier (cannot be divisible by taking the integer part and adding 1). Take 4600+ and 4800+ CPUs as examples :
That is, memory operating frequency=(CPU frequency÷multiplier/2)×2
X2 4800+, the main frequency is 2.5GHz, and the multiplier is 12.5. So the frequency divider of the memory is 7. At this time, the frequency of the memory operation=(2500M÷7)×2=714M
X2 4600+ The main frequency is 2.4GHz, and the multiplier is 12. So the frequency divider of the memory At this time, the frequency of memory running = (2400M÷6)×2=800M
4600+perfect support for DDR2-800
In simple terms, if the CPU’s If the main frequency is not divisible by 400, it means that the AM2 processor cannot run in the DDR2-800 mode at the default frequency.
Controller
The advantages of the CPU memory integrated memory controller There are many advantages of the CPU memory integrated memory controller. Three points stand out:
Integrated memory controller inside the first CPU
The memory controller of the traditional computer system is located inside the north bridge chip of the motherboard chipset, and the CPU needs to exchange data with the memory , It needs to go through the five steps of "CPU-North Bridge-Memory-North Bridge-CPU". In this mode, the data is transmitted through multiple stages, and the data delay is obviously large, which affects the overall performance of the computer system; and AMD's K8 Series CPUs (including various processors with interfaces such as Socket754/939/940) integrate memory controllers inside, and the data exchange process between CPU and memory is simplified into the three steps of "CPU-memory-CPU", omitted Two steps, obviously have lower data delay compared with the traditional memory controller solution, which helps to improve the overall performance of the computer system.
The second memory controller works at the same frequency as the CPU frequency
The internal memory controller integrated in the CPU can make the memory controller work at the same frequency as the CPU frequency ( The CPU operating frequency is generally above 2G), and the memory controller of the Northbridge is generally much lower than the CPU operating frequency, and the system delay is even less.
Integrated memory controller inside the third CPU
Integrated memory controller inside the CPU, because the memory data does not pass through the north bridge, it effectively reduces the working pressure of the north bridge , To reduce the affordability of North Bridge.
The internal integrated memory controller of the CPU is the K8, a major design highlight of the CPU. Although the Core Duo far exceeds the K8 in overall performance, the Core Duo is still far behind the K8 in terms of memory performance.
Features of the integrated memory controller
The advantage of the integrated memory controller inside the CPU is that it can effectively control the memory controller to work in the same way as the CPU core In terms of frequency, and because the data exchange between the memory and the CPU does not need to go through the North Bridge, it can effectively reduce the transmission delay. For example, this is like moving the goods warehouse directly next to the processing workshop, greatly reducing the time required for the transportation of raw materials and finished products between the goods warehouse and the processing workshop, and greatly improving production efficiency. As a result, the overall performance of the system has also been improved.
The biggest disadvantage of the integrated memory controller inside the CPU is that it has poor memory adaptability and flexibility. It can only use specific types of memory, and there are restrictions on the capacity and speed of the memory, and new types must be supported. For example, AMD’s K8 series CPUs can only support DDR and cannot support higher-speed DDR2. The traditional memory controller is located inside the north bridge chip of the motherboard chipset, so there is no such problem. You only need to replace the motherboard. You can use different types of memory without replacing the motherboard, such as IntelPentium 4 series CPU. If it is a motherboard that does not support DDR2, you can use DDR2 as long as you replace a motherboard that supports DDR2. If you have a motherboard that supports both DDR and DDR2, you can use DDR2 directly without replacing the motherboard.
Usually, for the entire PC system, we tend to focus only on the main frequency of the CPU, the frequency of the front side bus of the system, the operating frequency of the memory and the bus bandwidth between them, but the memory delay affects the system The performance impact is also considerable.
So, what is memory latency? Generally speaking, when the system needs to operate certain data, the CPU will issue instructions, and the data stored in the hard disk will be transferred to the memory, and then transferred from the memory to the CPU. However, the memory controller is usually integrated in the north bridge chip of the motherboard chipset, and data is transmitted through multiple levels, which often causes a certain delay. Therefore, the CPU cannot obtain the data in time after issuing the instruction, and process it. Memory latency has an important impact on system performance. The overall latency of a memory system is about 120-150ns. During this time, all the CPU can do is wait. Therefore, reducing the memory latency as much as possible is undoubtedly of great help to the improvement of system performance. To exchange data with memory, traditional processors need to go through "CPU-North Bridge-DIMM-North Bridge-CPU". And the processor core integrates the memory controller, the process will be simplified to "CPU-DIMM-CPU", omitting two steps.
This is probably one of the main reasons why AMD64-bit processors can show strong performance in 32-bit applications. The advantage of the integrated memory controller inside the processor is that it can effectively control the memory controller to work at the same frequency as the processor core, and because the data transmission between the memory and the processor does not need to pass through the North Bridge, it can effectively reduce the transmission delay. For example, this is like moving the goods warehouse directly next to the processing workshop, which greatly reduces the time required for the transportation of raw materials/finished products between the goods warehouse and the processing workshop, and greatly improves production efficiency. As a result, the overall performance of the system has also been improved. In the actual test, the clock cycle of Athlon 64 waiting for memory data is reduced by 30-40% compared with Athlon XP, and the overall performance of the system is improved by 25-30%.
Although the integrated memory controller can achieve high bandwidth and low latency, doesn't its upgrade become a big problem? Generally, if a new memory standard is introduced, the chipset manufacturer can directly develop a chipset that supports the new memory to support it. The integration of the memory controller into the processor core makes it difficult to upgrade, because changing the specifications that support memory requires changing the kernel. But as far as the situation is concerned, this doubt seems to be dispelled.
Development direction:
The integration of the memory controller into the CPU is obviously the future development direction, and its technology will become more and more perfect. In the future, Intel will also launch products with integrated memory controller CPUs.
Advantages and disadvantages
Advantages
1. The advantage of integrating the memory controller inside the CPU is that it can effectively control the memory controller to work at the same frequency as the CPU core, and because the data exchange between the memory and the CPU does not need to go through the North Bridge, it can effectively reduce the transmission delay. This is like moving the goods warehouse directly next to the processing workshop, which greatly reduces the time required for the transportation of raw materials and finished products between the goods warehouse and the processing workshop, and greatly improves production efficiency. As a result, the overall performance of the system has also been improved.
2. Reduce the burden of the North Bridge chip. Since the amount of data exchange between the CPU and the memory accounts for a large proportion of the entire computer data exchange, the workload of the North Bridge chip is greatly reduced after the integration, and it can be used for SATA, PCI-E, etc. The data exchange channel provides more efficient support.
Disadvantages
The biggest disadvantage of the integrated memory controller inside the CPU is its poor adaptability to memory and poor flexibility. It can only use specific types of memory and is The capacity and speed of the CPU are also limited. To support new types of memory, the internal integrated memory controller of the CPU must be updated, which means that a new CPU must be replaced; for example, AMD’s K8 series CPUs can only support DDR, but cannot support higher speeds. DDR2. The traditional memory controller is located inside the north bridge chip of the motherboard chipset, so there is no such problem. You only need to replace the motherboard. You can use different types of memory without replacing the motherboard, such as Intel Pentium4 series CPU. If the motherboard does not support DDR2, you can use DDR2 as long as you replace a motherboard that supports DDR2. If you have a motherboard that supports both DDR and DDR2, you can use DDR2 directly without replacing the motherboard.
Summary
Many applications have more complex read patterns (almost random, especially when cache hits are unpredictable) and do not use bandwidth efficiently. A typical application of this type is business processing software. Even with CPU features such as out of order execution, it will be limited by memory latency. In this way, the CPU must wait until the data required for the operation is loaded by the dividend before it can execute the instruction (regardless of whether the data comes from the CPU cache or the main memory system). The memory latency of the current low-end system is about 120-150ns, and the CPU speed has reached more than 3GHz, a single memory request may waste 200-300 CPU cycles. Even with a cache hit rate of 99%, the CPU may spend 50% of the time waiting for the end of the memory request-for example, due to memory latency.
You can see Opteron's integrated memory controller. Its latency is much lower than the latency of the chipset supporting dual-channel DDR memory controllers. Intel also integrates the memory controller inside the processor as planned, which will cause the Northbridge chip to become less important. However, the way the processor accesses the main memory is changed, which helps to increase bandwidth, reduce memory latency, and improve processor performance.
In the traditional computer system, the memory controller is located inside the north bridge chip of the motherboard chipset. The CPU needs to exchange data with the memory through the "CPU-North Bridge-Memory-North Bridge-CPU" five In this mode, data is transmitted through multiple stages, and the data delay is obviously relatively large, which affects the overall performance of the computer system; while AMD’s K8 series CPUs (including various processors with interfaces such as Socket 754/939/940) Integrating the memory controller, the data exchange process between the CPU and the memory is simplified to the three steps of "CPU-memory-CPU", omitting two steps, which is obviously lower than the traditional memory controller solution The data is delayed, which helps to improve the overall performance of the computer system.